Scheduling Analysis of the Micro Channel Architecture for Multimedia Applications

In recent years, fixed priority real-time scheduling has made significant advances. These advances have been applied primarily to CPU scheduling. While CPU scheduling is an important aspect of real-time designs, other shared system resources require the same attention in order for a system to transfer real-time traffic. This paper addresses one such resource, the system bus, and presents a methodology for analyzing bus structures, specifically buses carrying continuous media (CM), using fixed priority scheduling. A scheduling bus model for the Micro Channel Architecture which incorporates the non-ideal, real-world bus features is presented. A continuous media (CM) task set is used to explore design issues. These issues include the following: priority level assignment on the bus, the effect of task period transformation, the use of multi-level scheduling, and the effect of limited priority levels on the bus. In addition formulations will be made for setting bus parameters such as tenure time and DRAM refresh periods to optimize continuous media scheduling.